CppCon 2017: Chandler Carruth “Going Nowhere Faster”

Disclaimer: I am not an expert and have not measured. This is armchair theory. But, I would argue two things. First, the former appears to have at least one unaligned arithmetic: > 400538: mov 0x200b01(%rip),%rdx # 601040 <counter> ...while the latter's equivalent instruction is 4-byte aligned: > 40057d: mov 0x200abc(%rip),%rdx # 601040 <counter> So, I would argue that's the biggest source of _speedup_ in the second case. However, I'm really interested in whether that's true since I don't see a memory fence; so the memory should be in L0 cache for both cases; I have trouble believing that an unaligned access can be so much slower with the data in cache. As for the `callq` to `repz retq`, I would venture a guess that the CPU's able to identify that there are no data dependencies there and the data's never even stored; I'd argue that it probably never even gets executed because the instruction should fit in instruction cache and branch prediction cache and all. Arguably. Like I said, I'm not an expert. I'd say run it through Intel's code analyzer tool. [LINK] Tangential video worth watching: [VIDEO] Edit: actually, thinking about it, it's not unaligned access , it's unaligned math . I don't think that should affect performance at all? Fun.

>The YouTube inteface says "auto-generated" Ok, I never noticed that. I just read the captions and assumed obvious misspellings were auto-generated. For example in this video[1], the caption text is "L1D cache misses" but he's actually saying "L1-dcache misses" . (The Linux terminal screen he's showing does display "L1-dcache" .) Even though that video is not labeled as "auto-generated", I assumed it was because of the bad caption. Based on your info, I guess CppCon uses humans like Mechanical Turk or other non-domain typists to manually add the captions. [1] [VIDEO]

Chandler Carruth has a good talk with an example of why speculative execution is critical for performance. [VIDEO] It starts around 36m13s time frame.

Sure, but wouldn’t it make sense to extend the instruction set to allow the compiler to use these registers instead of reserving them for speculative / out-of-order execution? It was just a thought i had after watching a talk by a compiler guy: [VIDEO]

The best presentation I've seen about CPU performance related to pipelining, branch prediction, and speculative execution was Chandler Carruth's "Going Nowhere Faster" presentation at CppCon 2017 [0]. I do recommend watching the whole presentation, but if you watch nothing else then just watch the 5 minutes or so from the linked timestamp. [0]: [VIDEO]